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Design and Test of 16x16 Pixel CMOS Image Sensor Chip with On-Chip ADC in 0.18um Process

dc.contributor.authorLe, Line
dc.date.accessioned2023-03-10T23:00:05Z
dc.date.available2023-03-10T23:00:05Z
dc.date.issued2022
dc.identifier.citationLe, Line. Design and Test of 16x16 Pixel CMOS Image Sensor Chip with On-Chip ADC in 0.18um Process. Master thesis, University of Oslo, 2022
dc.identifier.urihttp://hdl.handle.net/10852/101260
dc.description.abstractA prototype CMOS Image Sensor chip is fabricated in 0.18 µm technology, featuring a 16 x 16 pixel array with a simple readout circuit and column-parallel ADCs. Row and column decoders are implemented to address the pixels.eng
dc.language.isoeng
dc.subjectADC
dc.subjectCMOS
dc.subjectAnalog Design
dc.subjectImage Sensor
dc.subjectMixed-Signal
dc.subjectMicroelectronics
dc.subjectCIS
dc.titleDesign and Test of 16x16 Pixel CMOS Image Sensor Chip with On-Chip ADC in 0.18um Processeng
dc.typeMaster thesis
dc.date.updated2023-03-10T23:00:05Z
dc.creator.authorLe, Line
dc.type.documentMasteroppgave


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