Low-Noise Input Stage in Selected Modern Semiconductor Technologies

Abstract

The low noise is key factor in acquisition systems if it is desired to be able to make precise measurements. Different semiconductors have different properties concerning noise. Noise will therefore be one of the most important criteria when choosing technologies. Therefore the noise in this thesis is considered as the function of the technology. In order to concrete this, some of the common RF architectures were chosen and it is focused on the component and internal coupling noise. Signal processing is not described in details, but some of trends that are part of the signal processing are mentioned and explained here. The first architecture is a single-ended structure with MOS transistors, designed in 0.6 µm process. The second architecture is a differential structure designed with two different technologies, BiCMOS 0.8 µm and SiGe. In both architectures the input stage consists of a low noise amplifier and a mixer. The noise contribution from dominant noise sources was estimated and calculation and simulation results were compared. The final results of this thesis are a useful guidance when considering the noise countermeasure of similar architectures. Studying the details concerning noise, calculations clearly shows which noise sources dominate in affecting the noise figure of the entire system. Increased signal gain of the input stage is the most important factor when reducing the equivalent input noise. It applies to all systems independent of the choice of technology. The methods and the procedures shown in this thesis will also be a useful guidance when considering the noise contribution of any circuit designed in the given technologies. However, noise reductions techniques require that the various factors and many trade offs have to be carefully considered.