Hide metadata

dc.contributor.authorKristiansen, Joakim
dc.date.accessioned2016-08-08T22:27:55Z
dc.date.available2016-08-08T22:27:55Z
dc.date.issued2016
dc.identifier.citationKristiansen, Joakim. Xeon Phi - A comparison between the newly introduced MIC architecture and a standard CPU through three types of problems.. Master thesis, University of Oslo, 2016
dc.identifier.urihttp://hdl.handle.net/10852/51079
dc.description.abstractAs Moore s law continues, processors keep getting more cores packed together on the chip. This thesis is an empirical study of the rather newly introduced Intel Many Integrated Core (IMIC) architecture found in the Intel Xeon Phi. With roughly 60 cores connected by a high performance on-die interconnect, the Intel Xeon Phi makes an interesting candidate for High Performance Computing. By digging into parallel algorithms solving three well known problems, our goal is to optimize, test and compare run times with a regular Xeon processor. Results and their evaluations will be presented along the way, before a conclusion is drawn in the end. We also present limitations for the Intel Xeon Phi encountered from the tests.eng
dc.language.isoeng
dc.subjectXeon
dc.subjectPhi
dc.subjectHPC
dc.subjectEmpirical
dc.subjectStudy
dc.subjectParallel
dc.subjectProgramming
dc.titleXeon Phi - A comparison between the newly introduced MIC architecture and a standard CPU through three types of problems.eng
dc.typeMaster thesis
dc.date.updated2016-08-08T22:27:55Z
dc.creator.authorKristiansen, Joakim
dc.identifier.urnURN:NBN:no-54603
dc.type.documentMasteroppgave
dc.identifier.fulltextFulltext https://www.duo.uio.no/bitstream/handle/10852/51079/7/Master.pdf


Files in this item

Appears in the following Collection

Hide metadata