Sampled and Continuous-Time 1-Bit Signal Processing in CMOS for Wireless Sensor Networks

Abstract

This thesis investigates theoretical aspects of 1-bit signal processing and contains published papers describing many different CMOS implementations that utilize such processing. So-called Suprathreshold Stochastic Resonance (SSR) systems are studied in detail. These systems take a noisy signal as input and then 1-bit quantize it. As it turns out, the combination of noise, coarse quantization, and also integration, results in systems that, perhaps a bit unexpectedly, have quite good performance. This is known as the Stochastic Resonance (SR) phenomenon. Many interesting plots explaining different aspects of the behavior of SSR systems are shown. Detailed explanations of when SSR systems should and should not be used in, are given. This includes analysis of their power consumption. One of the most interesting results in this thesis, is that when the input to the SSR system has flicker noise, the SNR loss in the system will be negligible. With white Gaussian noise, the SNR loss will be much larger, namely 1.96 dB. The flicker-noise result does not seem to have been published before. In addition to using 1-bit signal processing, most of the CMOS implementations also utilize Impulse-Radio Ultra- WideBand (IR-UWB), and yet another commonality is that they can be used for Wireless Sensor Network (WSN) applications. Many of the implementations base much of their signal processing on Continuous-Time Binary-Value (CTBV) signals, which is an unusual way of doing things and therefore an interesting experiment. Some of the CMOS implementations are as follows: Radar, localization, communication, beamforming, bitstream processing, n-path band-pass filter, and power harvesting.

All papers are made available in DUO with permissions from the publishers.

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